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 /  Faculty / Dr. Mohamed Asan Basiri M

Dr. Mohamed Asan Basiri M

Faculty of Electronics and Communication Engineering

Education:  Ph.D. – IIITDM Kancheepuram.

Areas of Interest:

VLSI for Signal Processing, VLSI for Information Security, Hardware-Software Co-design, Formal Hardware Verification, and Fault Tolerant Designs. 

 

Professional Experiences 
 
  1. Post Doctoral Fellow from 05 August 2016 to 02 March 2019 in IIT Kanpur.
  2. Research Associate from 28 December 2015 to 04 August 2016 in IIT Kanpur
 
List of Conference Publications
 
  1. Mohamed Asan Basiri M and Sandeep K. Shukla, “Formal Hardware Verification of InfoSec Primitives”, IEEE Computer Society Annual Symposium on VLSI, Miami, Florida, USA, July 2019 (Accepted for oral presentation).
  2. Mohamed Asan Basiri M and Sandeep K. Shukla, “Efficient Hardware-Software Codesigns of AES Encryptor and RS-BCH Encoder”, International Symposium on VLSI Design and Test (VDAT), Communications in Computer and Information Science, Springer, vol. 892, pp. 3–15, June 2018, India.
  3. Mohamed Asan Basiri M and Noor Mahammad Sk, “An Efficient VLSI Architecture for Convolution Based DWT Using MAC ”, 31st IEEE International Conference on VLSI Design, pp. 271-276, Jan. 2018, India. 
  4. Mohamed Asan Basiri M and Sandeep K. Shukla, “Flexible Composite Galois Field GF ((2^m)^2) Multiplier Designs”, International Symposium on VLSI Design and Test (VDAT), Communications in Computer and Information Science, Springer, vol. 711, pp. 3-14, June 2017, IIT Roorkee, India. 
  5. Mohamed Asan Basiri M and Noor Mahammad Sk, “High Performance Integer DCT Architectures for HEVC ”, 30th IEEE International Conference on VLSI Design, pp. 121-126, Jan. 2017, India. 
  6. Mohamed Asan Basiri M and Sandeep K. Shukla, “Hardware Optimizations for Crypto Implementations”, IEEE International Symposium on VLSI Design and Test (VDAT), pp. 1-6, May 2016, IIT Guwahati, India. 
  7. Mohamed Asan Basiri M and Noor Mahammad Sk, “An Efficient VLSI Architecture for Discrete Hadamard Transform”, IEEE International Conference on VLSI Design, pp. 140-145, Jan. 2016, India. 
  8. Mohamed Asan Basiri M and Noor Mahammad Sk, “Memory Based Multiplier Design in Custom and FPGA implementation”, International Symposium on Advances in Intelligent Systems and Computing, Springer, vol. 320, pp. 253-265, Sep. 2014, India. 
  9. Mohamed Asan Basiri M and Noor Mahammad Sk, “An Efficient Hardware Based MAC Design in Digital Filters with Complex Numbers”, IEEE International conference on signal processing and integrated networks (SPIN), pp. 475-480, Feb. 2014, India. 
  10.  Mohamed Asan Basiri M, Samaresh Chandra Nayak, and Noor Mahammad Sk, “Multiplication Acceleration Through Quarter Precision Wallace Tree Multiplier ”, IEEE International conference on signal processing and integrated networks (SPIN), pp. 502-505, Feb. 2014, India. 
  11.  Shanmuga Kumar M, Mohamed Asan Basiri M, and Noor Mahammad Sk, “High Precision and High Speed Handheld Scientific Calculator Design Using Hardware Based CORDIC Algorithm”, International Conference on Design and Manufacturing, Procedia Engineering, Elsevier, vol. 64, pp. 56-64, 2013, India.
 
List of Journal Publications (SCI)
  1. Mohamed Asan Basiri M and Noor Mahammad Sk, Discrete Orthogonal Multi-transform on Chip (DOMoC), Journal of Signal Processing Systems, Springer, vol. 91, no. 5, pp. 437-457, May. 2019. 
  2. Mohamed Asan Basiri M and Sandeep K. Shukla, “Asynchronous Hardware Implementations for Crypto Primitives”, Microprocessors and Microsystems, Elsevier, vol. 64, pp. 221-236, Feb. 2019.
  3. Mohamed Asan Basiri M and Sandeep K. Shukla, “Low Power Hardware Implementations for Network Packet Processing Elements”, Integration, the VLSI Journal, Elsevier, vol. 62, pp. 170-181, Mar. 2018.
  4. Mohamed Asan Basiri M and Sandeep K. Shukla, “Flexible VLSI Architectures for Galois Field Multipliers”, Integration, the VLSI Journal, Elsevier, vol. 59, pp. 109-124. Sept. 2017.
  5. Mohamed Asan Basiri M and Noor Mahammad Sk, “Quadruple Throughput Fixed Point Quarter Precision Multiply-Accumulate Circuit Design”, IET Computers and Digital Techniques, vol. 11, no. 5, pp. 183-189, Sept. 2017.
  6. Mohamed Asan Basiri M and Noor Mahammad Sk, “An Efficient VLSI Architecture for Lifting Based 1D/2D-Discrete Wavelet Transform”, Microprocessors and Microsystems, Elsevier, vol. 47, pp. 404-418, Nov. 2016.
  7. Mohamed Asan Basiri M and Noor Mahammad Sk, “Multi-mode Parallel and Folded VLSI Architectures for 1D-Fast Fourier Transform”, Integration, the VLSI Journal, Elsevier, vol. 55, pp. 43-56, Sept. 2016.
  8. Mohamed Asan Basiri M and Noor Mahammad Sk, “High Speed Multiplexer Design Using Tree Based Decomposition Algorithm”, Microelectronics Journal, Elsevier, vol. 51, pp. 99-111, May 2016.
  9. Mohamed Asan Basiri M and Noor Mahammad Sk, “Configurable Folded IIR Filter Design”, IEEE Transactions on Circuits and Systems – II, Express Briefs, vol. 62, no. 12, pp. 1144-1148, Dec. 2015.
  10. Mohamed Asan Basiri M and Noor Mahammad Sk, “An Efficient Hardware Based Higher Radix Floating Point MAC Design”, ACM Transactions on Design Automation of Electronic Systems, vol. 20, no. 1, pp. (15) 1-25, Nov. 2014.

Contact: asan@iiitk.ac.in